Chm Blog From the Collection , Guest Blog

The Whirlwind Computer at CHM

By Guy Fedorkow | November 30, 2018

Courtesy of the MIT Museum

Courtesy of the MIT Museum

While the history of computing is littered with controversial claims of firsts, it’s clear that the late 1940s and early 1950s saw a dramatic uptake of the basic ideas of electronic stored-program computing with many important developments.

One of these developments took place at MIT with the building of a machine called Whirlwind. Funded by the Office of Naval Research and the US Air Force, Whirlwind was a large-scale digital machine that was among the first to tackle the use of high-throughput calculation for real-time problems like aircraft simulation and air traffic control.

This vacuum-tube computer was first brought online at the end of 1949, with continuing development for several more years. Whirlwind was a one-of-a-kind research machine, and although only one was ever built, it had an important influence on many subsequent systems, most directly on the SAGE AN/FSQ-7 Air Defense computer.

Although much of Whirlwind was lost when the machine was decommissioned, the Computer History Museum (CHM) and the MIT Museum retain many of the machine’s components, some of which are on display in CHM’s permanent exhibition, Revolution: The First 2000 Years of Computing. This essay places the pieces on display in the context of the overall, original computer.

What’s Whirlwind?

Despite its early date, Whirlwind’s designers used concepts that are still very familiar to current computer designers (although now found in $25 machines like the Arduino, rather than research machines costing over $3 million in 1950-dollars!). Some of the points that could have gone on a Whirlwind data sheet include:

  • 16-bit word length (most PCs now support 64-bit words)
  • 2,048-word main memory (most PCs now come with several gigabytes—1,000,000 times more)
  • 50,000 “add” operations per second (many PCs attain billions of instructions per second)
  • More than 100 kw power consumption (high-end servers now consume up to a couple hundred watts)

Whirlwind’s computing architecture is lean but not unfamiliar. The machine had a couple of 16-bit registers, a 16-bit add/subtract unit, and a hardware multiplier/divider, all organized around a single, uniform 2,048-word memory system, as proposed by John von Neumann only a few years earlier. Read Von Neumann’s “First Draft of a Report on the EDVAC.”

Figure 1: WW Programmer's View

Figure 1: WW Programmer's View

Whirlwind racks on display in Revolution. The revolutionary MIT Whirlwind computer used about 5,000 vacuum tubes and, in the mid-1950s, was among the most powerful computers in the world. Photo © Mark Richards.

Whirlwind racks on display in Revolution. The revolutionary MIT Whirlwind computer used about 5,000 vacuum tubes and, in the mid-1950s, was among the most powerful computers in the world. Photo © Mark Richards.

As a physical object, the Whirlwind computer was large. The computer itself occupied over 2,000 square feet in a room on the second floor of the Barta Building at MIT,1 with auxiliary drum storage equipment on the first floor and power-conditioning gear in the basement. The machine was not built to minimize floor space; the project leader, Jay Forrester, knew that reliability would be a key concern and wanted to ensure that every single component, cable and vacuum tube, was easy to access and repair. The machine was assembled in 98 racks2 in the second-floor computer room, with another 18 racks of indicators, switches, oscilloscopes, control knobs, etc. in the control room.

Three of these racks are on display in CHM’s Revolution exhibition. Let’s examine where those racks fit in the machine.

Floor Plan

Here’s a floor plan of the second-floor Whirlwind computer room, as it was in 1951. Each rectangle represents one rack, with a letter-number functional identifier. Racks are arranged in five rows with a central aisle.

Figure 2: Barta Computer Room Floor Plan

Figure 2: Barta Computer Room Floor Plan

Each row of racks was focused on a specific function:

  • The “C” row at the back of the room contained the control logic that decoded instructions and issued control signals to the rest of the machine. This row also included the “Toggle Switch Registers,” a sort of 32-word read-only memory composed of 256 individual switches, used to program the initial operations of the machine.3
  • The “A” row housed the registers and arithmetic logic. As shown in the block diagram in Figure 1, this row contains the 16-bit A and B registers; the Accumulator with its add, subtract, multiply, divide, and shift primitives; and the program counter.
  • The 2,048-word memory system was implemented in the “E” row. Whirlwind had a long and storied history with this critical element of the architecture. In the 1950 machine, memory was implemented with electrostatic storage (ES) tubes, which stored bits as tiny dots on a phosphor screen. The ES tubes were never reliable and by 1953, had been replaced by the first magnetic core memories ever put into reliable production use. While Whirlwind broke ground in a number of areas, the reduction of bistable magnetic materials to core-memory practice had a long-lasting and critical impact on the computer field, forming the mainstay element in computer memory for decades. This 1951 floor plan shows the Electrostatic memory; by 1953, this row had been replaced by the new magnetic core memory.
  • Row “F” contains vacuum tube “flip-flop registers.” In addition to the challenging ES memory, Whirlwind had a tiny amount of memory (five words—80 bits) implemented as individual vacuum tube flip-flops. This row of racks implemented those 80 bits of storage.
  • The final “P” row houses power controllers. Whirlwind pioneered “marginal checking” (now known as “voltage margining”), a method by which power supply voltages were varied during operation of diagnostic software to weed out weak components before they failed in normal operation.

So, What’s on Display?

Revolution contains three Whirlwind racks; the center and right-hand racks are identical, one facing forward, the other turned around backward.

Arithmetic Unit

The two identical racks each implement one bit of the main arithmetic unit for the machine.4 That is, each of these two identical racks hold eight distinct bits, plus associated logic—one bit of each of the Instruction Register, Program Counter, A Register, Accumulator, B Register, IO Register, Check Register, and Comparison Register. On the floor plan, there are 16 of these identical racks labeled A0 through A15, together providing the complete 16-bit arithmetic unit.

Figure 3: WW Physical Partitioning

Figure 3: WW Physical Partitioning

Figure 4: Panel Designation for Arithmetic Rack

Figure 4: Panel Designation for Arithmetic Rack

To keep the design manageable, the Whirlwind team divided each rack into a series of panels, each with a specific function, roughly corresponding to blocks on the system block diagram. For the arithmetic racks, the panels are assigned as in Figure 4. Each panel has a name to describe its function (for example, “B Register”) and a three-digit block number that lines up with the system block diagrams. Each arithmetic rack contains one bit of storage plus all the associated logic for these units.5

Within the Arithmetic unit, the Accumulator panel (Block 302) is the most complex. This unit was responsible for the actual arithmetic—adding, subtracting, complementing, carrying, and shifting. The image reproduced in Figure 5, from the document Whirlwind I Computer Block Diagrams, shows what’s in the Accumulator panel.

The block diagram of the Whirlwind Accumulator panel shows a number of components:

  • FF block is a single Flip-Flop, that is, one bit of storage. Each flip-flop is implemented with two vacuum tubes.
  • GT is a Gate Tube, which is used to transmit a signal to one of the interconnect buses in the machine, during a specific clock phase.
  • DE is a delay element.

The Accumulator panel has a total of 28 vacuum tubes to implement one bit, so the complete 16-bit Accumulator would have used 16 panels, or 448 vacuum tubes.

Figure 5: Accumulator panel (Block 302) in the Arithmetic unit.

Figure 5: Accumulator panel (Block 302) in the Arithmetic unit.

Test Storage

The left-most Whirlwind rack on display in Revolution contains the “Test Storage,” a tiny amount memory implemented with vacuum tube flip-flops. This rack type was replicated sixteen times in the F Row on the floor plan to form five words of storage. The one rack on display implements five bits of storage, and was one rack from the F0-F15 row.

In spite of its small capacity, Test Storage was critical during the initial development and testing of Whirlwind, when the arithmetic unit was functional long before the electrostatic memory tubes were working.

Then and Now

Arduino DIY microcontroller. Image: SparkFun Electronics.

Arduino DIY microcontroller. Image: SparkFun Electronics.

Where would you find a computer comparable to Whirlwind today? The popular Arduino DIY microcontroller is not far off in capacity, although it’s many times faster.

Figure 6: Datasheet comparison of Whirlwind and Arduino.

Figure 6: Datasheet comparison of Whirlwind and Arduino.

The Legacy of Whirlwind

Whirlwind was a research machine with no direct commercial successor. But the machine still had an outsize impact on the overall development of computing:

  • Whirlwind’s implementation of magnetic core memory was used for decades in most commercial computers.
  • Whirlwind was used as the prototype for the SAGE Air Defense computer program, which played an important part in the developing Cold War scene.
  • Whirlwind programmers made important contributions to the emerging art of software development by creating a series of computer language tools.
  • Whirlwind pioneered the use of computers in real-time control applications, in contrast to the commonly used business and scientific machines based on punched-card batch job systems.

Best of all, Whirlwind designers went on to seed the next generation of developments at MIT’s Lincoln Labs, MITRE, Digital Equipment Corporation, and others.

Not bad for a machine that could only fit five bits of storage in rack . . .

For Further Reading

  • Kent C. Redmond and Thomas M. Smith, Project Whirlwind, The History of a Pioneer Computer, © 1980, Digital Press.
  • Many scanned Whirlwind documents can be found in the MIT Libraries Dome online site at
  • There are many scanned Whirlwind docs at, including these cited in this article: Report 2M-0277 Whirlwind Programming Manual, October 1958; R-127 Whirlwind I Computer Block Diagrams, Volume 1, September 4, 1947; and R-127 Whirlwind I Computer Block Diagrams, Volume 2, September 4, 1947.


  1. The Barta building is still there, at 211 Massachusetts Ave, Cambridge, Massachusetts, although it’s been heavily renovated more than once since Whirlwind days. The site is marked now with an IEEE historical milestone plaque.
  2. A “rack,” aka a “relay rack” is a standardized shelving system still common in computing. A single rack stands on the floor, is about 20 inches wide, and usually about six feet tall.
  3. That is, it’s the boot ROM.
  4. Careful observers will note, that while the panels themselves are completely authentic Whirlwind equipment, the racks into which they are bolted are made of modern materials. The original racks don’t seem to have survived.
  5. The careful observer will note that laying out the units with one bit of each register all in the same rack reduces the length of the main interconnect bus. If it was A Register in some racks, B register in some more, etc., the floor plan would be crisscrossed by bundles of 16-bit coaxial cables.

Editor's Note

Look for a special holiday blog post from Guy on December 16—67 years to the day after the Whirlwind Jingle Bells program made its first public debut.

About The Author

Guy C. Fedorkow received his BASc and MASc in Engineering Sciences at University of Toronto, and went on to develop both communications and high-throughput parallel computer architectures at Bolt, Berank and Newman in Cambridge, MA, Cisco Systems and Juniper Networks, where he has served as system architect for a number of communications products.

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